100 GSa/s Super-Resolution Photonic ADC Model
Underwrite optically-sampled analog-to-digital converter (ADC) ASICs leveraging 10-femtosecond mode-locked laser pulses (digitizing 40 GHz RF signals at 100 Giga-samples/second with 10x lower aperture jitter than electronic ADCs). Model defense radar and 6G telecom chip sales ($4,500/chip), and 15-yr IRR.
1. Capacity & Unit Economics
2. Financial Returns & Yield
10-FEMTOSECOND JITTER 40 GHz SAMPLINGAnnual Net EBITDA
$0 / yr
15-Yr Project IRR
0.0%
Gross Revenue
$0 / yr
Total CapEx
$0
Annual OpEx
$0 / yr